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[VHDL-FPGA-VerilogH16550_2[1].0V

Description: 专门做处理器和周边接口的著名ipcore厂商CAST出品的UART H16550 ,包含完整的使用说明手册、testbench、可综合,如果被网站认可,将继续上传其余的几个更好的core。-specialized processor and peripheral interfaces famous ipcore CAST product manufacturers UART H16 550, including full use manual testbench can be integrated, if the site is approved, the rest will continue to upload a few better core.
Platform: | Size: 386048 | Author: 宋云成 | Hits:

[ARM-PowerPC-ColdFire-MIPSmips-uart-16550

Description: MIPS架构下串口API函数集合,包括getchar\putchar\scanf\printf-MIPS architecture Serial API function set, including getchar \ putchar \ Scanf \ printf
Platform: | Size: 4096 | Author: 栋梁 | Hits:

[Windows Developuart16550.tar

Description: The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with modem or other external devices, like another computer using a serial cable and RS232 protocol. This core is designed to be maximally compatible with the industry standard National Semiconductors’ 16550A device. -The UART (Universal Asynchronous Receive r/Transmitter) core provides serial Communic ation capabilities, which allow communication with the modem or other e xternal devices, like another computer using a serial cable and R RS232 protocol. This core is designed to be maxim ally compatible with the industry standard Nat ional Semiconductors' 16550A device.
Platform: | Size: 187392 | Author: 邓云 | Hits:

[Com PortPCCOM-SRC

Description: 用C++写的RS232串口异步通讯功能模块,支持16550 UART芯片,中断收发数据,波特率最大115200bps,自定义收发数据缓冲大小,支持软硬件流控。-C wrote asynchronous RS232 serial communication module, 16550 UART chip, Transceivers interruption data, 115,200 bps maximum baud rate, since the definition of sending and receiving data buffer size, support hardware and software flow control.
Platform: | Size: 103424 | Author: alex | Hits:

[Com Portuart16550

Description: uart16550 IP核 HDL源代码,对设计自己uart的人员和学习串口通讯有一定的参考价值!其中,附有详细的所明文档!-uart16550 IP HDL source code, uart to design their own study of serial communication and has some reference value. Which, with detailed documentation as prescribed!
Platform: | Size: 291840 | Author: Jack | Hits:

[VHDL-FPGA-Veriloguart_core_vhdlORverilog

Description: 串uart的vhdl,verilog,lattic实现原码 里面有四个文件,分别UART 源码 (lattice version)\uart 源码 (Verilog)\uart 源码 (VHDL)\uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) \ uart source (Verilog) \ uart source (VHDL) \ uart16550.tar
Platform: | Size: 294912 | Author: efly | Hits:

[Program docWindowsCEqudong

Description: Windows CE下驱动程序开发基础,   Windows CE下的串口驱动程序能够处理所有I/O行为类似串口的设备,包括基于16450、16550 UART(通用异步收发芯片)的设备和一些采用DMA的设备,常见的有9针串口、红外I/O口、Modem等-Windows CE Driver Development under the foundation, Windows CE under the serial driver to handle all I/O behavior similar to serial devices, including those based on 16450,16550 UART (Universal Asynchronous Receiver-chip) devices and some of the equipment used DMA common 9-pin serial port, infrared I/O port, Modem, etc.
Platform: | Size: 5120 | Author: lentil | Hits:

[Com Portuart16550

Description: uart source code from opencore
Platform: | Size: 202752 | Author: liuKe | Hits:

[VHDL-FPGA-Verilog16550

Description: UART16550兼容的串行通讯控制器,Verilog语言描述,采用Altera Cyclone系列芯片实现FPGA综合,因为FIFO部分利用到内部资源实现。已经在某项目中成功应用,特此推出。-UART16550 compatible serial communication controller, Verilog language description, the use of Altera Cyclone series FPGA chip integrated, as part of the use of FIFO to the internal resources to achieve. Projects have been in a successful application, is hereby introduced.
Platform: | Size: 10240 | Author: David.Mr.Liu | Hits:

[SCMUART

Description: Universal Asynchronous Receiver/Transmitter,通用异步接收/发送装置,UART是一个并行输入成为串行输出的芯片,通常集成在主板上,多数是16550AFN芯片。-Universal Asynchronous Receiver/Transmitter, universal asynchronous receive/transmit device, UART is a parallel input serial output of the chip to become normally integrated on the motherboard, most 16550AFN chip.
Platform: | Size: 114688 | Author: 清风 | Hits:

[Linux-Unixns16550

Description: ns 16550 linux uart driver -ns 16550 linux uart driver
Platform: | Size: 1024 | Author: tony wang | Hits:

[SCMDebugUART

Description: 16550 uart debug interface.-16550 debug interface.
Platform: | Size: 3072 | Author: 陳豐昇 | Hits:

[Com Portuart

Description: uart协议、实现、验证,基于wishbone协议,工业标准为16550A-UART protocol, implementation, verification, based on the Wishbone protocol, the industry standard for the 16550A
Platform: | Size: 257024 | Author: dannel218 | Hits:

[Com Portuart16750_latest.tar

Description: Implements a 16550/16750 UART core
Platform: | Size: 100352 | Author: Arun | Hits:

[Com Portuart16550

Description: uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can be downloaded from the CVS tree along with the source code. -uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can be downloaded from the CVS tree along with the source code.
Platform: | Size: 1760256 | Author: CloudZhang | Hits:

[VHDL-FPGA-Veriloguart16550_latest[1].tar

Description: 开源UART IP核16550,该IP核兼容16550 UART,具有Modem功能,完全可编程的串行接口具有可设置的字符长度、奇偶校验、停止位以及波特率生成器。-Open-source UART IP core 16550, the IP core is compatible with 16550 UART, with Modem function, fully programmable serial interface can be set up with a character length, parity, stop bits and baud rate generator.
Platform: | Size: 1559552 | Author: lisa1027 | Hits:

[Com Porta_vhd_16550_uart_latest.tar

Description: 16550 uart vhdl source code
Platform: | Size: 119808 | Author: mss | Hits:

[VHDL-FPGA-Veriloguart16550

Description: Implementation of the UART 16550 model with verilog langugue
Platform: | Size: 40960 | Author: quang | Hits:

[assembly languageSwitch

Description: Pronounced u-art, and short for universal asynchronous receiver-transmitter, the UART is a computer component that handles asynchronous serial communication. Every computer contains a UART to manage the serial ports, and some internal modems have their own UART. As modems have become increasingly fast, the UART has come under greater scrutiny as the cause of transmission bottlenecks. If you are purchasing a fast external modem, make sure that the computer s UART can handle the modem s maximum transmission rate. The newer 16550 UART contains a 16-byte buffer, enabling it to support higher transmission rates than the older 8250 UART.-Pronounced u-art, and short for universal asynchronous receiver-transmitter, the UART is a computer component that handles asynchronous serial communication. Every computer contains a UART to manage the serial ports, and some internal modems have their own UART. As modems have become increasingly fast, the UART has come under greater scrutiny as the cause of transmission bottlenecks. If you are purchasing a fast external modem, make sure that the computer s UART can handle the modem s maximum transmission rate. The newer 16550 UART contains a 16-byte buffer, enabling it to support higher transmission rates than the older 8250 UART.
Platform: | Size: 4096 | Author: sstefan | Hits:

[Com Port16550u

Description: Dos下使用串口实现先进先出,支持COM1-COM4- 16550 is a shareware program designed to allow the unlocking of the internal fifo buffer present in the UART chip of the same name. The program will scan all four COM ports (COM1:- COM4:) available on the PC and report the presence (if any...) of the 16550 UART. The user may optionally set the various parameters necessary to utilize this buffered mode of operation.
Platform: | Size: 28672 | Author: Seraphim | Hits:
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